IEEE Design & Test 
November - December 2003 
http://www.computer.org/dt/ 



Features 

Guest Editors' Introduction: Clockless VLSI Systems 
Soha Hassoun, Yong-Bin Kim, and Fabrizio Lombardi 

Three Generations of Asynchronous Microprocessors 
Alain J. Martin, Mika Nystrom, and Catherine G. Wong 

 Reducing Power Dissipation, Delay, and Area in Logic Circuits by Narrowing Transistors 
Stephen H. Unger 

 Design and Characterization of Null Convention Self-Timed Multipliers 
Satish K. Bandapati, Scott C. Smith, and Minsu Choi 

Cycle Decomposition in NCL 
Steve Masteller and Lief Sorenson 

Implementation of a Self-Timed Segmented Bus 
Juha Plosila, Tiberiu Seceleanu, and Pasi Liljeberg 

Automating Wave-Pipelined Circuit Design 
Woo Jin Kim and Yong-Bin Kim 

Special Section: Perspectives in EDA 

 The Tides of EDA 
Alberto Sangiovanni-Vincentelli 

Fabless or IDM? What the Future Holds for Both 
An Interview with Cirrus Logic Chairman 
Michael L. Hackworth 

DAC Roundtable: 
What Is the Next Implementation Fabric? 

Departments 

EIC Message 
The Road Ahead 
Standards 
Panel Summaries 
Conference Reports 
TTTC Newsletter 
DATC Newsletter 
Annual Index 
The Last Byte 
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